1. Field of the Invention
The present invention relates to an image forming apparatus that performs data processing and print control in response to a print command based on a control program stored in a memory, and more particularly, to an image forming apparatus that stores a multi-system control program in a memory, and performs data processing and print control based on the control program of the system corresponding to the type of the unit that the image forming apparatus comes equipped with. The present invention can be implemented on a printer, a multifunction product (MFP), and a facsimile.
2. Description of the Related Art
It is very common to store programs, for the purpose of updation or for convenience, in a flash read-only memory (ROM) provided in image forming apparatuses. Storing the programs in the flash ROM eliminates the need for analyzing the product when updating the programs, and allows the user to download programs or data from any commonly used memory such as a integrated circuit (IC) card via an external device interface (I/F). When an IC card is detected via the external device I/F, the program on the IC card is read by substituting the flash ROM address with that of the IC card on the memory map and downloading the data on the IC card to the flash ROM. The address substitution is implemented by decoding the address signal output by a central processing unit (CPU), and generating a chip selection signal for the IC card to the accessing device. From the viewpoint of circuit pattern and cost, it is most efficient to provide an address decoder in the form of a CPU peripheral application-specific integrated circuit (ASIC). Development rate can be improved if a common ASIC can be used by several models. In the case where the substrate itself upon which the ASIC is mounted is shared by a plurality of models, different models will require different devices or capacities. A device is proposed in Japanese Patent Application Laid-open No. 2000-207276 that absorbs these differences in the requirements of devices and capacities. The device causes the address decoding to be flexibly altered by register setup, and based on a hardware detection signal that indicates that a capacity suitable for the device be allocated, changes the size of the address space corresponding to each chip selection signal.
However, in recent years, model development has come to be implemented by kitting sales where the functionalities of a product in the market can be expanded by providing optional functions and additional functions, or the functionalities of a product, which is manufactured in a low-cost low functionality form and a high-cost high functionality form, can be enhanced by adding functionalities at the site (service station, etc.). However, the program corresponding to the additional functions should be downloaded and kept ready in advance. Often, depending on the status of model development, only programs for low-cost low functionality model types are available. Many a time, depending on the additional functionality, software development for low functionality model and high functionality model are carried out independently to improve development rate, making it difficult to provide a single comprehensive program in the period allocated for development. Further it is difficult to accurately estimate the volume of the program for low functionality and high functionality at the beginning of development. Therefore, the volumes allocated during hardware selection are on the higher side.
Thus, although it is effective to perform address decoding and flexibly vary the memory capacity according to the chip selection signal, the ROM capacity that is appropriate for the program volume must be set appropriately, according to the volume distribution set for low functionality program and high functionality program and development schedule. In the conventional method, different programs have to be provided in different devices, necessitating a larger substrate, resulting in increased cost. Further, in a conventional method, if there is free space in the address area accessed by the CPU, the shortfall ROM area can be allocated to the free space. However, although it is possible to increase the ROM area evenly under certain conditions such as bank switching, it is not preferable to have equal distribution of ROM area between low functionality program and high functionality program.